Direct analog-to-residue conversion
Residue Number System (RNS) offers significant advantages over conventional number system in terms of parallel signal processing and power consumption. This makes it ideally suitable for communication, computer security, digital signal processing, in which long word addition and multiplication are i...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2014
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| Online Access: | https://hdl.handle.net/10356/55400 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Residue Number System (RNS) offers significant advantages over conventional number system in terms of parallel signal processing and power consumption. This makes it ideally suitable for communication, computer security, digital signal processing, in which long word addition and multiplication are involved critically. However, traditional Analog-Digital (binary)-Residue conversion scheme requires large silicon area and high power consumption. Therefore, direct Analog–to-Residue conversion starts to attract attention from circuit designers and researchers. In this thesis, a novel direct A/R conversion scheme based on clock overlapping is proposed. The intermediate binary stage was eliminated completely. 2 comparators, 1 OpAmp, 1 resistor, 1 Capacitor, Flip-Flops and several combinational circuit blocks, where n is the number of modulus channels and m is the modulus number. The logarithmically increase in hardware complexity and the low power dissipation make it ideally suitable for low-power high resolution application. A 3 channels (modulus 3,4,5) converter consumes 159.104µW, with analog blocks and digital blocks consume 127.152 µW and 31.952 µW respectively. With more research to improve sampling speed, this technique will be more viable for future high speed application. |
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