Portable audio synthesizer

• Main Author: Cheong, Si Wei
• Other Authors: School of Computer Engineering
• Format: Final Year Project
• Language: English
• Published: 2014
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/59190
• Institution: Nanyang Technological University

Digital signal processing is used widely to perform manipulative effects on the digital signal input. The objective of this final year project is to build a Portable Audio Synthesizer that could provide various digital sound effects to a recorded sound track. A field-programmable gate array (FPGA) would be used to prototype this system and provide the required digital sound effects. This project requires deep understanding of the underlying structure of the FPGA and the various IP cores available in the Altera University Program. Furthermore, on top of achieving the objective of this project, Bitcoin mining was also considered and implemented to further enhance the overall functionality of the FPGA and the erudition outcome. Two Development Tools were used in this project, namely Quartus II v13.01 and Nios II EDS 13.0.1. Quartus II v13.01 was used to implement the system design with the help of Verilog, a Hardware Description Language (HDL). The Nios II EDS 13.0.1 was used to implement the required functions. The programming was done using C language and the code is flashed onto the on-board flash memory in order for the Altera DE1 to run the program. Substantial amount of knowledge in low level programming and hardware description language were essential to achieve the project objective. On top of that, detailed project planning and independent learning have helped to pave the path to the project’s success. Throughout this project, the greatest learning outcome is attaining ability to recognize the importance of the design before implementation.