Development of a system for data transfer between computer and FPGA board

• Main Author: Tien, Liting
• Other Authors: Jong Ching Chuen
• Format: Final Year Project
• Language: English
• Published: 2014
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/60180
• Institution: Nanyang Technological University

In recent days, Field-Programmable Gate Array (FPGA) and Digital Signal Processing (DSP) devices are becoming more and more popular for high speed processing. FPGA being an ideal solution for logical intensive applications while DSP for intensive and complex arithmetic applications. In this project, we made use of a FPGA device, where data are being transferred from the PC to the FPGA device for data processing and then transferred back to the PC. The key ‘idea’ of doing this is to utilize the high speed processing embedded in the FPGA which is usually not found in PC. FPGA unlike most PC which uses a microprocessor, processes instructions in a sequential fashion which may not be ideal is some cases. For instance, to perform a 1’s complement of a byte data array will mean that the microprocessor have to run through each pointer to invert each byte individually before proceeding to the next, however for an FPGA, functioning like logical circuits, will mean that the inversion can be performed in parallel as there are excess free gates found in the FPGA which also mean multiple bytes of data can be inverted instead of one byte in a single clock cycle saving up processing time. The only down side to this particular application is that, having the data to transfer back and forth between the PC and FPGA will mean extra overhead in terms of time on top of the processing time of the FPGA. For implementation of the project specifications, XEM6010-LX45 board which features the Xilinx Spartan-6 FPGA with high-speed USB connectivity is acquired and used while the Xilinx IDE is used to code the Verilog HDL and the user interface is being implemented with Opal Kelly Front Panel API using XML coding.