Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment

In this thesis, the performance of various scheduling heuristics of a single serial processing machine with multiple job types in the semiconductor assembly test environment is analyzed. Two types of heuristics are developed in this research. The heuristic with next arrival information is compared w...

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Main Author:	Jiang, Nan
Other Authors:	Appa Iyer Sivakumar
Format:	Theses and Dissertations
Language:	English
Published:	2014
Subjects:	DRNTU::Engineering::Manufacturing
Online Access:	http://hdl.handle.net/10356/60644
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Institution:	Nanyang Technological University
Language:	English

id	sg-ntu-dr.10356-60644
record_format	dspace
spelling	sg-ntu-dr.10356-606442020-11-01T11:39:13Z Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment Jiang, Nan Appa Iyer Sivakumar School of Mechanical and Aerospace Engineering Singapore-MIT Alliance Programme DRNTU::Engineering::Manufacturing In this thesis, the performance of various scheduling heuristics of a single serial processing machine with multiple job types in the semiconductor assembly test environment is analyzed. Two types of heuristics are developed in this research. The heuristic with next arrival information is compared with the heuristic without future information to study how the performance is influenced by forecast. Considering the dynamic manufacturing characteristics of the semiconductor industry, the impact of different level of forecast error is analyzed under different traffic intensities. Two sets of heuristics are tested in simulations to demonstrate that the performance of a model with future information highly depends on how the forecast information is utilized in the heuristics. Master of Science (IMST) 2014-05-29T03:34:40Z 2014-05-29T03:34:40Z 2010 2010 Thesis http://hdl.handle.net/10356/60644 en 79 p. application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
language	English
topic	DRNTU::Engineering::Manufacturing
spellingShingle	DRNTU::Engineering::Manufacturing Jiang, Nan Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
description	In this thesis, the performance of various scheduling heuristics of a single serial processing machine with multiple job types in the semiconductor assembly test environment is analyzed. Two types of heuristics are developed in this research. The heuristic with next arrival information is compared with the heuristic without future information to study how the performance is influenced by forecast. Considering the dynamic manufacturing characteristics of the semiconductor industry, the impact of different level of forecast error is analyzed under different traffic intensities. Two sets of heuristics are tested in simulations to demonstrate that the performance of a model with future information highly depends on how the forecast information is utilized in the heuristics.
author2	Appa Iyer Sivakumar
author_facet	Appa Iyer Sivakumar Jiang, Nan
format	Theses and Dissertations
author	Jiang, Nan
author_sort	Jiang, Nan
title	Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
title_short	Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
title_full	Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
title_fullStr	Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
title_full_unstemmed	Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
title_sort	scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment
publishDate	2014
url	http://hdl.handle.net/10356/60644
_version_	1688665687000612864

Scheduling strategies of a single serial processing machine with multiple job types in the semiconductor assembly test environment

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