A study of semiconductor back-end manufacturing : special focus on scheduling techniques
The purpose of this project was to study the impact of release input, lot dispatch and lot batching policies on the mean and variance of cycle time in the semiconductor back-end facility.
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| Main Authors: | , , |
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| Other Authors: | |
| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/60653 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | The purpose of this project was to study the impact of release input, lot dispatch and lot batching policies on the mean and variance of cycle time in the semiconductor back-end facility. |
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