Design of a variable rate low power SAR ADC with bypass window for biomedical application

In recent years, there is an increasing demand for portable, wearable or implantable biomedical devices. These devices generally require extremely long battery life-time which in turn demands extremely low-power band-pass filters, low-noise amplifiers and low-power ADC. SAR ADC is typically adopted...

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Main Author: Liu, Yaoping
Other Authors: Yvonne Lam Ying Hung
Format: Theses and Dissertations
Language:English
Published: 2015
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Online Access:https://hdl.handle.net/10356/62157
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-621572023-07-04T16:22:24Z Design of a variable rate low power SAR ADC with bypass window for biomedical application Liu, Yaoping Yvonne Lam Ying Hung School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits In recent years, there is an increasing demand for portable, wearable or implantable biomedical devices. These devices generally require extremely long battery life-time which in turn demands extremely low-power band-pass filters, low-noise amplifiers and low-power ADC. SAR ADC is typically adopted in these devices because of its higher power efficiency compared to other ADC architectures (e.g., flash ADC, pipeline ADC). Nevertheless, a big proportion of energy is still consumed by the conventional SAR ADC. Hence, extensive research is still required to further lower the power consumption. Meanwhile, many biomedical signals vary slightly within a small range for a large portion of time. Incorporating this signal characteristic into the design, a bypass window technique that can increase the power efficiency of the SAR ADC in biomedical signal acquisition is proposed here. This technique is based on the idea that when the input signal is within a predefined range, several conversion steps for the first few significant bits are bypassed, i.e., fewer switching instances happen in the capacitive DAC and hence less power is consumed during the switching sequence. Besides, the design has a 2-stage low-power dynamic comparator and a TSPC DFF constructed phase generator, which helps to lower the overall power consumption further for our SAR ADC. In the current project, the SAR ADC is designed and implemented in GLOBALFOUNDARIES 40nm CMOS process. The simulation results show that with sampling frequency from 0 to 2MHZ, this ADC can achieve a SNDR of 61.55dB and ENOB of 9.93bits. It can reduce 74% of the power dissipation if the bypass window function is triggered. MASTER OF ENGINEERING (EEE) 2015-02-10T09:12:57Z 2015-02-10T09:12:57Z 2014 2014 Thesis Liu, Y. (2014). Design of a variable rate low power SAR ADC with bypass window for biomedical application. Master’s thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/62157 10.32657/10356/62157 en 95 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Liu, Yaoping
Design of a variable rate low power SAR ADC with bypass window for biomedical application
description In recent years, there is an increasing demand for portable, wearable or implantable biomedical devices. These devices generally require extremely long battery life-time which in turn demands extremely low-power band-pass filters, low-noise amplifiers and low-power ADC. SAR ADC is typically adopted in these devices because of its higher power efficiency compared to other ADC architectures (e.g., flash ADC, pipeline ADC). Nevertheless, a big proportion of energy is still consumed by the conventional SAR ADC. Hence, extensive research is still required to further lower the power consumption. Meanwhile, many biomedical signals vary slightly within a small range for a large portion of time. Incorporating this signal characteristic into the design, a bypass window technique that can increase the power efficiency of the SAR ADC in biomedical signal acquisition is proposed here. This technique is based on the idea that when the input signal is within a predefined range, several conversion steps for the first few significant bits are bypassed, i.e., fewer switching instances happen in the capacitive DAC and hence less power is consumed during the switching sequence. Besides, the design has a 2-stage low-power dynamic comparator and a TSPC DFF constructed phase generator, which helps to lower the overall power consumption further for our SAR ADC. In the current project, the SAR ADC is designed and implemented in GLOBALFOUNDARIES 40nm CMOS process. The simulation results show that with sampling frequency from 0 to 2MHZ, this ADC can achieve a SNDR of 61.55dB and ENOB of 9.93bits. It can reduce 74% of the power dissipation if the bypass window function is triggered.
author2 Yvonne Lam Ying Hung
author_facet Yvonne Lam Ying Hung
Liu, Yaoping
format Theses and Dissertations
author Liu, Yaoping
author_sort Liu, Yaoping
title Design of a variable rate low power SAR ADC with bypass window for biomedical application
title_short Design of a variable rate low power SAR ADC with bypass window for biomedical application
title_full Design of a variable rate low power SAR ADC with bypass window for biomedical application
title_fullStr Design of a variable rate low power SAR ADC with bypass window for biomedical application
title_full_unstemmed Design of a variable rate low power SAR ADC with bypass window for biomedical application
title_sort design of a variable rate low power sar adc with bypass window for biomedical application
publishDate 2015
url https://hdl.handle.net/10356/62157
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