Power-stage design for switched- mode DC-DC converter

• المؤلف الرئيسي: Lim, Yong Siah
• مؤلفون آخرون: Victor Adrian
• التنسيق: Final Year Project
• اللغة: English
• منشور في: 2015
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/63517
• المؤسسة: Nanyang Technological University

This project pertains to the design of power transistors for a high switching-frequency DC-DC converter. We investigate the optimum tapering factor to design the buffer for the power transistors. Simulation results of the power transistors with the buffer designed with the optimum tapering factor sh...