Power-stage design for switched- mode DC-DC converter

This project pertains to the design of power transistors for a high switching-frequency DC-DC converter. We investigate the optimum tapering factor to design the buffer for the power transistors. Simulation results of the power transistors with the buffer designed with the optimum tapering factor sh...

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書目詳細資料
主要作者: Lim, Yong Siah
其他作者: Victor Adrian
格式: Final Year Project
語言:English
出版: 2015
主題:
在線閱讀:http://hdl.handle.net/10356/63517
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機構: Nanyang Technological University
語言: English