Dual-rail CMOS circuits
Dual-rail CMOS logic, also called as differential CMOS logic handles both true and complementary signals at any time. Various dual-rail CMOS logic styles have been designed and explored, including differential cascade voltage switch logic (DCVSL), complementary pass-transistor logic (CPL), differ...
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sg-ntu-dr.10356-659072023-07-04T16:04:48Z Dual-rail CMOS circuits Zhang, Beixi Lau Kim Teen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Dual-rail CMOS logic, also called as differential CMOS logic handles both true and complementary signals at any time. Various dual-rail CMOS logic styles have been designed and explored, including differential cascade voltage switch logic (DCVSL), complementary pass-transistor logic (CPL), differential cascade voltage switch with pass-gate (DCVSPG) logic, and double pass-transistor logic (DPL). These kinds of dual-rail CMOS logic will be simulated by Cadence. The simulation results and application of the dual-rail CMOS circuits in full adder are also presented in this dissertation, which will be tested by simulating circuits with Cadence. Master of Science (Electronics) 2016-01-13T08:11:41Z 2016-01-13T08:11:41Z 2016 Thesis http://hdl.handle.net/10356/65907 en 97 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering Zhang, Beixi Dual-rail CMOS circuits |
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Dual-rail CMOS logic, also called as differential CMOS logic handles both true and
complementary signals at any time. Various dual-rail CMOS logic styles have been
designed and explored, including differential cascade voltage switch logic (DCVSL),
complementary pass-transistor logic (CPL), differential cascade voltage switch with
pass-gate (DCVSPG) logic, and double pass-transistor logic (DPL). These kinds of
dual-rail CMOS logic will be simulated by Cadence. The simulation results and
application of the dual-rail CMOS circuits in full adder are also presented in this
dissertation, which will be tested by simulating circuits with Cadence. |
author2 |
Lau Kim Teen |
author_facet |
Lau Kim Teen Zhang, Beixi |
format |
Theses and Dissertations |
author |
Zhang, Beixi |
author_sort |
Zhang, Beixi |
title |
Dual-rail CMOS circuits |
title_short |
Dual-rail CMOS circuits |
title_full |
Dual-rail CMOS circuits |
title_fullStr |
Dual-rail CMOS circuits |
title_full_unstemmed |
Dual-rail CMOS circuits |
title_sort |
dual-rail cmos circuits |
publishDate |
2016 |
url |
http://hdl.handle.net/10356/65907 |
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1772828581180735488 |