Design of an 8-bit CMOS dynamic voltage reference analog-to-digital converter
In this project, an 8-bit dynamic voltage reference analog-to-digital converter (ADC) is designed to encode a continuous-time analog input signal ranging from 0 to 1V into 8-bit discrete digital words, where ‘0’ is represented by 0V and ‘1’ is represented by 1.8V supply voltage level. The circui...
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| Main Author: | |
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2016
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/67653 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | In this project, an 8-bit dynamic voltage reference analog-to-digital converter (ADC)
is designed to encode a continuous-time analog input signal ranging from 0 to 1V
into 8-bit discrete digital words, where ‘0’ is represented by 0V and ‘1’ is represented
by 1.8V supply voltage level.
The circuit design of this project is implemented in Cadence Virtuoso® Schematic
Editor and simulated in Cadence Virtuoso® Analog Design Environment (ADE). In
the ADC dynamic characterization part, MATLAB® is utilized to facilitate Fast
Fourier Transform (FFT) analysis.
The proposed 8-bit CMOS dynamic voltage reference based ADC consists of several
sub-blocks such as voltage comparator, current steering digital-to-analog converter
(DAC) and wide-swing constant transconductance bias with start-up. Validated by
AMS 0.18 μm CMOS process, the proposed ADC can achieve an effective number
of bits (ENOB) of 7.6168 bits with a sampling frequency of 2.5 MHz. The power
consumption is 4.9842 mW under 1.8 V supply voltage. Compared with other
reported 8-bit ADC counterparts, it shows a good Figure-of-Merit (FOM) of 10.157
pJ with other comparable performance. |
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