High-speed DC-DC converter IC layout design

This project elaborates on the studies of the design techniques, both traditional CMOS technology as well as other semiconductor technologies. These technologies are compared and analyse on their differences as a possible means to improve the high speed DC-DC converter’s efficiency despite of the re...

Full description

Saved in:
Bibliographic Details
Main Author: Goh, Tien Ying
Other Authors: Gwee Bah Hwee
Format: Final Year Project
Language:English
Published: 2016
Subjects:
Online Access:http://hdl.handle.net/10356/67871
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-67871
record_format dspace
spelling sg-ntu-dr.10356-678712023-07-07T16:17:09Z High-speed DC-DC converter IC layout design Goh, Tien Ying Gwee Bah Hwee School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems DRNTU::Engineering This project elaborates on the studies of the design techniques, both traditional CMOS technology as well as other semiconductor technologies. These technologies are compared and analyse on their differences as a possible means to improve the high speed DC-DC converter’s efficiency despite of the restriction implemented in order to meet stringent requirement impose by the portable environment. The studies of design techniques on the traditional CMOS technology as well as other semiconductor technologies will be implemented in the gate driver stage to boost and provide sufficient current into the power transistors of DC-DC converter. These layouts are designed using Cadence Virtuoso platform. In addition, the report serves as a basis and foundation for upcoming students to apprehend the CMOS design techniques, restriction of design rules based on fabrication limitation, various layout matching methods and an understanding of using Cadence Virtuoso to design layout. Bachelor of Engineering 2016-05-23T05:52:38Z 2016-05-23T05:52:38Z 2016 Final Year Project (FYP) http://hdl.handle.net/10356/67871 en Nanyang Technological University 65 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering
spellingShingle DRNTU::Engineering
Goh, Tien Ying
High-speed DC-DC converter IC layout design
description This project elaborates on the studies of the design techniques, both traditional CMOS technology as well as other semiconductor technologies. These technologies are compared and analyse on their differences as a possible means to improve the high speed DC-DC converter’s efficiency despite of the restriction implemented in order to meet stringent requirement impose by the portable environment. The studies of design techniques on the traditional CMOS technology as well as other semiconductor technologies will be implemented in the gate driver stage to boost and provide sufficient current into the power transistors of DC-DC converter. These layouts are designed using Cadence Virtuoso platform. In addition, the report serves as a basis and foundation for upcoming students to apprehend the CMOS design techniques, restriction of design rules based on fabrication limitation, various layout matching methods and an understanding of using Cadence Virtuoso to design layout.
author2 Gwee Bah Hwee
author_facet Gwee Bah Hwee
Goh, Tien Ying
format Final Year Project
author Goh, Tien Ying
author_sort Goh, Tien Ying
title High-speed DC-DC converter IC layout design
title_short High-speed DC-DC converter IC layout design
title_full High-speed DC-DC converter IC layout design
title_fullStr High-speed DC-DC converter IC layout design
title_full_unstemmed High-speed DC-DC converter IC layout design
title_sort high-speed dc-dc converter ic layout design
publishDate 2016
url http://hdl.handle.net/10356/67871
_version_ 1772827874410102784