A robust CMOS temperature sensor for system-on chip applications

• Main Author: Ma, Lin
• Other Authors: Chan Pak Kwong
• Format: Final Year Project
• Language: English
• Published: 2016
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/68066
• Institution: Nanyang Technological University

Accuracy is one of the most important parameters for temperature sensor design. Improvements on this parameter usually imply lower production cost and more reliable functions. However, few current temperature sensor designs in 65nm process technology have inaccuracy less than 1°C. This project is aimed to design a 65nm CMOS temperature sensor with inaccuracy less than 1°C for System-on Chip applications. Besides, supply insensitivity is also emphasized in this project. Several design techniques with robustness objective are adopted in this sensor circuit design. From simulation results of Cadence Virtuoso, an inaccuracy of 0.9~0.986°C and a linearity of 99.95% are achieved. The output variation is 0.31~0.28% under ±10% supply variation at 27°C in TT corner. Besides, the total power consumption is only 12.486µW, which is comparable to most of recently published works. Future work can be done to complete the integrated circuit design cycle including layout, fabrication and testing.