Hardware friendly algorithm development for real time video analysis system for security monitoring

• Main Author: Chandrasekaran Samyukta
• Other Authors: Goh Wang Ling
• Format: Theses and Dissertations
• Language: English
• Published: 2016
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/68685
• Institution: Nanyang Technological University

Video analysis has become a hot research topic recently due to its huge potential for application in intelligent monitoring for security and automatic control. Currently, most video analysis systems are implemented using software, which limits the speed and size of the system. In the near future, video analysis is likely to be integrated in camera for intelligent monitoring system. It is therefore worth exploring hardware solution for achieving small real-time video analysis systems. In this dissertation, we propose to achieve small real-time video analysis systems using FPGA-based hardware. During the project, the video analysis algorithms will be partitioned into software and hardware by considering its control complexity and internal parallelism. The algorithm parts with high control complexity will be partitioned in software for flexibility, while the parts with high parallelism will be partitioned into hardware for speed acceleration. Based on the partition, software and hardware cooptimization will be performed by modeling and simulation of the mixed system to reduce the complexity and improve the performance. After that, the proposed system will be implemented on FPGA where the hardware part is implemented using reconfigurable logic arrays, and the software part is implemented using hard DSP core in the FPGA. For the software to be implemented, we use the tool MATLAB.