Shortest path computation for roadway network

Undeniably, autonomous vehicles have found its position within the vehicle industry. In the absence of human drivers, the vehicle is fully reliant on the on-board computers for navigation, collision avoidance, etc. For transportation, shortest path computation plays a crucial role, where besides pro...

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Main Author: Khoo, Gilbert Teng Sheng
Other Authors: Lam Siew Kei
Format: Final Year Project
Language:English
Published: 2016
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Online Access:http://hdl.handle.net/10356/69217
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-692172023-03-03T20:51:13Z Shortest path computation for roadway network Khoo, Gilbert Teng Sheng Lam Siew Kei School of Computer Science and Engineering DRNTU::Engineering::Computer science and engineering Undeniably, autonomous vehicles have found its position within the vehicle industry. In the absence of human drivers, the vehicle is fully reliant on the on-board computers for navigation, collision avoidance, etc. For transportation, shortest path computation plays a crucial role, where besides providing the shortest path, the demand for shorter computation time is increasing from time to time, so as to adapt to the frequent changing of traffic conditions. In this project, we investigate hardware efficient architectures for shortest path computations that is based on a novel shortest path algorithm. We show that the proposed architecture is able to reduce the total amount of computations for nodes relaxations compared to the hardware implementation of the conventional Bellman- Ford algorithm,. This is achieved by incorporating Node filtering to avoid unnecessary computations. In addition, the nodes relaxation process in the proposed architecture adopts the SIMD model, where the tentative distance for neighbours of a single node can be computed in parallel. We also explored the utilization of various caches and their configurations to determine a good trade-off between performance and logic area utilization. We compared the performance of the hardware simulation model of the proposed algorithm and conventional Bellman-Ford algorithms using Singapore Roadway Network, which consists of 140219 nodes and 193071 edges. The experimental results show that the proposed architecture leads to over 40% performance improvement. Bachelor of Engineering (Computer Engineering) 2016-11-29T08:43:26Z 2016-11-29T08:43:26Z 2016 Final Year Project (FYP) http://hdl.handle.net/10356/69217 en Nanyang Technological University 58 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Computer science and engineering
spellingShingle DRNTU::Engineering::Computer science and engineering
Khoo, Gilbert Teng Sheng
Shortest path computation for roadway network
description Undeniably, autonomous vehicles have found its position within the vehicle industry. In the absence of human drivers, the vehicle is fully reliant on the on-board computers for navigation, collision avoidance, etc. For transportation, shortest path computation plays a crucial role, where besides providing the shortest path, the demand for shorter computation time is increasing from time to time, so as to adapt to the frequent changing of traffic conditions. In this project, we investigate hardware efficient architectures for shortest path computations that is based on a novel shortest path algorithm. We show that the proposed architecture is able to reduce the total amount of computations for nodes relaxations compared to the hardware implementation of the conventional Bellman- Ford algorithm,. This is achieved by incorporating Node filtering to avoid unnecessary computations. In addition, the nodes relaxation process in the proposed architecture adopts the SIMD model, where the tentative distance for neighbours of a single node can be computed in parallel. We also explored the utilization of various caches and their configurations to determine a good trade-off between performance and logic area utilization. We compared the performance of the hardware simulation model of the proposed algorithm and conventional Bellman-Ford algorithms using Singapore Roadway Network, which consists of 140219 nodes and 193071 edges. The experimental results show that the proposed architecture leads to over 40% performance improvement.
author2 Lam Siew Kei
author_facet Lam Siew Kei
Khoo, Gilbert Teng Sheng
format Final Year Project
author Khoo, Gilbert Teng Sheng
author_sort Khoo, Gilbert Teng Sheng
title Shortest path computation for roadway network
title_short Shortest path computation for roadway network
title_full Shortest path computation for roadway network
title_fullStr Shortest path computation for roadway network
title_full_unstemmed Shortest path computation for roadway network
title_sort shortest path computation for roadway network
publishDate 2016
url http://hdl.handle.net/10356/69217
_version_ 1759853371172323328