Low power logic-in-memory circuit design

Nonvolatile memory (NVM) is a type of computer memory that can retain its previously stored information even if power supply is completely shut off. With existing technology in the CMOS-based very-large-scale integration (VLSI), several challenges has been encountered. As the number of transistors r...

Full description

Saved in:
Bibliographic Details
Main Author: Teo, Darren
Other Authors: Kim Tae Hyoung
Format: Final Year Project
Language:English
Published: 2017
Subjects:
Online Access:http://hdl.handle.net/10356/71007
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-71007
record_format dspace
spelling sg-ntu-dr.10356-710072023-07-07T16:47:41Z Low power logic-in-memory circuit design Teo, Darren Kim Tae Hyoung School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Nonvolatile memory (NVM) is a type of computer memory that can retain its previously stored information even if power supply is completely shut off. With existing technology in the CMOS-based very-large-scale integration (VLSI), several challenges has been encountered. As the number of transistors required in VLSI is increasing throughout the year, issue such as communications bottleneck between memory and logic modules as well as the increasing standby power dissipation has come into concerned. With the introduction of MTJ-Based Nonvolatile Logic-in-Memory Circuit MTJ, logic and memory storage elements are integrated into a logic-circuit plane in this circuit. Data are permanently stored in MTJ devices even if power is cut off. This result in lesser static power used to store data into memory. It was also tabulated that there was a 23% reduction in dynamic power dissipation compared to conventional CMOS circuit as the number of current paths from Vdd to GND has been reduce in this circuit design. It also helps reduces the chip area as lesser number of devices were used. Bachelor of Engineering 2017-05-12T07:22:54Z 2017-05-12T07:22:54Z 2017 Final Year Project (FYP) http://hdl.handle.net/10356/71007 en Nanyang Technological University 33 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Teo, Darren
Low power logic-in-memory circuit design
description Nonvolatile memory (NVM) is a type of computer memory that can retain its previously stored information even if power supply is completely shut off. With existing technology in the CMOS-based very-large-scale integration (VLSI), several challenges has been encountered. As the number of transistors required in VLSI is increasing throughout the year, issue such as communications bottleneck between memory and logic modules as well as the increasing standby power dissipation has come into concerned. With the introduction of MTJ-Based Nonvolatile Logic-in-Memory Circuit MTJ, logic and memory storage elements are integrated into a logic-circuit plane in this circuit. Data are permanently stored in MTJ devices even if power is cut off. This result in lesser static power used to store data into memory. It was also tabulated that there was a 23% reduction in dynamic power dissipation compared to conventional CMOS circuit as the number of current paths from Vdd to GND has been reduce in this circuit design. It also helps reduces the chip area as lesser number of devices were used.
author2 Kim Tae Hyoung
author_facet Kim Tae Hyoung
Teo, Darren
format Final Year Project
author Teo, Darren
author_sort Teo, Darren
title Low power logic-in-memory circuit design
title_short Low power logic-in-memory circuit design
title_full Low power logic-in-memory circuit design
title_fullStr Low power logic-in-memory circuit design
title_full_unstemmed Low power logic-in-memory circuit design
title_sort low power logic-in-memory circuit design
publishDate 2017
url http://hdl.handle.net/10356/71007
_version_ 1772827510692642816