Technology-enhanced learning (TEL) of logic circuits (A)

• Main Author: Hu, Tengzhou
• Other Authors: Jong Ching Chuen
• Format: Final Year Project
• Language: English
• Published: 2017
• Subjects: DRNTU::Engineering::Computer science and engineering::Software::Software engineering; DRNTU::Science::Mathematics::Discrete mathematics::Algorithms; DRNTU::Engineering::Computer science and engineering::Information systems::Information interfaces and presentation
• Online Access: http://hdl.handle.net/10356/71597
• Institution: Nanyang Technological University

In the course of teaching undergraduates the basic concept of digital electronics, the faculty imparts the knowledge and skill to analyze and derive the function and output of electronic components. Evaluation is an essential part of learning. Thus, it is crucial for the faculty to continue designing questions for the students to practice. Conventionally, a question designer takes almost half a day to design 5 – 6 questions such that each question’s difficulty is moderated to the undergraduates’ level, along with corresponding solutions. This project aims to deliver a graphical user interface that can procedurally generate questions on logic circuits for the undergraduates to practice, and validate their inputs. For the scope of Technology-Enhanced Learning of Logic Circuits (A), the program aims to deliver cascading logic gate questions and multiplexor questions. The program developed is able to generate questions of logic circuits consisting of random logic gates up to three levels as well as consisting of multiplexor and logic gates. The randomly generated circuits are displayed graphically for the users to practice solving logic circuit problems. The program also produces the solutions for the generated circuits and takes in the users’ input for validation. This report documents the design, development, implementation and testing of the program.