Switched-capacitor power converters for battery-powered and self-powered applications

Today's portable electronic devices are becoming more feature-rich and yet power hungry. Designing the power management units to meet the increasing power consumption without sacrificing the battery life has never been more challenging. The design of power converters to interface with various t...

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Bibliographic Details
Main Author: Xiao, Zhekai
Other Authors: Siek Liter
Format: Theses and Dissertations
Language:English
Published: 2017
Subjects:
Online Access:http://hdl.handle.net/10356/72723
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Institution: Nanyang Technological University
Language: English
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Summary:Today's portable electronic devices are becoming more feature-rich and yet power hungry. Designing the power management units to meet the increasing power consumption without sacrificing the battery life has never been more challenging. The design of power converters to interface with various types of energy harvesters is also gaining substantial attention due to the emerging Internet-of-Things devices. This research explores the feasibility of using switched-capacitor (SC) power converters for both battery-powered and battery-less applications. Chapter 3 presents a lower boundary hysteretic control method for a SC DC-DC converter, which achieves optimal output voltage ripple by matching the output sampling frequency to the converter switching frequency. The converter responses instantly to step-up load transients that are smaller than six times the initial load current. When larger load steps occur, the sampling frequency jumps to its maximum value, resulting in small output voltage undershoots while using an output capacitance value on the same order as the flying capacitance. A 1/2 step-down SC DC-DC converter using on-chip flying capacitance is fabricated in 0.18 µm CMOS process, which achieves 86.4% peak efficiency and delivers a maximum output power of 5.6 mW. Chapter 4 extends the use of hysteretic control technique to multiphase interleaved SC DC-DC converters. The proposed technique achieves both tight regulation in the steady state and fast response during the load transients with the aid of three control boundaries. In the steady state, the output voltage is regulated around a reference voltage, i.e. the first control boundary. The phase number is changed by a minimum step size from cycle to cycle to achieve tight regulation. To improve the load transient response, a higher and a lower control boundary are introduced whereby the controller switches to a coarse operation mode whenever the output voltage crosses the higher or lower control boundaries. The converter achieves a peak efficiency of 81.5% and delivers a maximum output power of 7 mW. In order eliminate the output voltage ripple and improve the transient response. An in-phase output voltage regulation, which combines NMOS-LDOs with the power switches of the SC converter in both charging and discharging phases, is proposed. An adaptive gate slope technique is used to reduce the output glitches during phase transitions and a gate pre-charge technique assists the turn-on of the regulated transistor when the respective phase begins. The proposed converter, implemented in 0.18 µm CMOS technology, achieves a peak efficiency of 83.3% and achieves less than 0.5 mV output voltage ripple and less than 10 mV output glitches when delivering 100 mA output current. To meet the demand for self-powered devices in the IoT era, a triple-topology reconfigurable SC DC–DC converter is proposed for indoor photovoltaic energy harvesting. To improve the overall energy efficiency, the first converter topology transfers the energy from the PV cell to the load in one conversion stage when the PV energy is available and the load is demanding energy. When the load demands no energy, the excess energy in the PV cell is stored in the buffer through the second topology. The third topology acts as the backup converter, which is enabled to deliver the stored energy to the load when the PV energy is not available. The proposed converter was fabricated in 0.18 μm CMOS process and achieves peak efficiencies of 87, 88 and 78% while delivering energy from the PV cell to the load, from the PV cell to the buffer and from the buffer to the load, respectively.