Data-driven dynamic logic for low power adders and multipliers
In today’s world, all the electronic devices are expected to operate with high speed, low power dissipation, occupying lesser area and show higher performance. To ensure these criteria, there are many logics proposed for digital circuit implementation. For high speed operation, clocks are mandatory...
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| 格式: | Theses and Dissertations |
| 語言: | English |
| 出版: |
2018
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| 主題: | |
| 在線閱讀: | http://hdl.handle.net/10356/73110 |
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| 機構: | Nanyang Technological University |
| 語言: | English |