A fast-transient DC-DC buck converter
With the rapid development of system-on-chip integration and continuously scaling-down power supply, nowadays portable battery-powered devices have higher and sharper energy requirements. Switching converters are widely used as voltage regulators in those devices because of its high power-conversion...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2018
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| Online Access: | http://hdl.handle.net/10356/73635 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | With the rapid development of system-on-chip integration and continuously scaling-down power supply, nowadays portable battery-powered devices have higher and sharper energy requirements. Switching converters are widely used as voltage regulators in those devices because of its high power-conversion efficiency. Due to the high-speed application and different modes operation requirements, the embedded microprocessors or digital systems operate at a higher frequency and the system need to switch between different modes more frequently. The frequently changing load induces significant undershoot/overshoot variation, which will deteriorate the overall system performance and stability. In this prospective, the fast-transient response becomes one of the key requirements for DC-DC converters in nowadays high-performance applications. Investigation of fast-transient techniques has been conducted to improve the transient response of DC-DC buck converters. A new pumping control scheme called Power-Driving-Tracked-Duration (PDTD) control is proposed to enhance the transient performance in the voltage-mode hysteretic DC-DC converters. It operates only when a large load current change is detected. Comparing with conventional counterparts, it simultaneously accelerates the transient response, reduces the undershoot/overshoot voltage and the effect of multiple undershoots/overshoots during the load current transitions. A theoretical analysis is also conducted to validate the circuit technique. The measured output voltage ripple is about 60mVpp. The obtained undershoot/overshoot settling time is 369ns/335ns in response to a 60-to-300mA/300-to-60mA load current step. The peak efficiency is about 93%. The prototype is fabricated using TSMC 40nm CMOS process as a proof-of-concept. |
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