Algorithms and circuits for low-power machine learning IC

• Main Author: Lim, Kelvin Hong Ann
• Other Authors: Arindam Basu
• Format: Final Year Project
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/74948
• Institution: Nanyang Technological University

In today’s Big Data era, where large amounts of data is processed every day every moment, there is a growing need to develop a better performance Machine Learning system. Previous work on hardware implementation of extreme learning machine (ELM) for smart sensors have shown the potential of using analog processing and the extreme learning machine (ELM) algorithm. However, there is still room for improvements in terms of speed, energy efficiency and area. It is well known that neuron activation function is very important in any learning algorithm as it affects the efficiency of a learning algorithm. This project aims to explore the possibility of using latch based comparator as neuron, generate a sign function as neuron activation function. In this paper, we prove that although a sign function is less efficient in terms of software compared with conventional sigmoid function, it is actually more energy efficient when implemented on a circuit. To verify this, the efficiency of each activation function is first simulated in Matlab. Then, a low power 111 kHz hardware implementation of ELM with energy efficiency of 0.21 pJ/MAC is presented and compared with previous work.