A fast transient digital low dropout voltage regulator

• Main Author: Heng, Amos Kai Xiang
• Other Authors: Chan Pak Kwong
• Format: Final Year Project
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/74949
• Institution: Nanyang Technological University

A voltage regulator is an important device block when it comes to power management in integrated circuits design for system-on-chip applications. It is used to regulate and maintain the voltage of a power source as close to the reference voltage defined by the user. A high-performance voltage regulator should provide a stable direct current voltage regardless of the load current, temperature changes and alternating current disturbance. Most voltage regulators consist of a feedback system to maintain the output voltage to keep it within a certain tolerable range to run other electrical devices. Digital voltage regulators are required to have fast transient response and short settling time with low noise level to prevent system error and other problems. Producing accurate output as well as good power efficiency are also important for low power devices that are operating at low voltages. A conventional Digital Low Dropout (DLDO) voltage regulator can achieve low voltage operation as well as 98.7% current efficiency using 65nm CMOS technology[1]. The simulation is based on a 0.6V supply voltage and a quiescent current of 1.37µA in 40nm CMOS technology. It shows an improvement of the conventional DLDO regulator by including an additional block for coarse and fine-tuning method into the whole system. It has achieved 59.2µs settling time. This gives faster transient response when compared to that of the conventional DLDO.