A low quiescent power low dropout voltage regulator for internet-of-things applications

• Main Author: Sangeetha, Siddhartan
• Other Authors: Chan Pak Kwong
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/76346
• Institution: Nanyang Technological University

Power management has become one of the major focus in electronics industry. It is largely based on the massive proliferation of the battery operated electronic devices that are portable, such as laptops, mobile phones and so forth. Due to simple design, fast-response and low-cost, low dropout (LDO) voltage regulators offer one of the best options for power management solutions. Due to the stringent quiescent current consumption requirement, low quiescent LDO regulator is needed for IoT or portable applications. In this work, the design and implementation of a 40nm CMOS output-capacitorless FVF cascade based LDO regulator incorporating the proposed adaptive bias is presented. Implemented in 40nm CMOS technology together with the input supply voltage of 1.2V and the output voltage of 1V, the simulation results have shown that the regulator has achieved the quiescent current of about 300nA, the settling time of 1.6μs and the dropout voltage of 200mV. The proposed circuit technique eliminates the need of frequency compensation whilst permitting low quiescent bias. This saves the silicon area needed by the compensation capacitor. This benefits for small-area implementation. The comparative simulations have shown that the proposed regulator has achieved lower quiescent power consumption and fast settling time. This has met the design objectives and the IoT application requirements.