Simulation and analysis of three-level converter topology for high power applications

• Main Author: Kuek, Zen Yee
• Other Authors: Josep Pou
• Format: Final Year Project
• Language: English
• Published: 2019
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/78106
• Institution: Nanyang Technological University

This report outlines the research and work that has been done as part of the Final Year Project that focuses on Three-Level Converters, particularly that of the Neutral Point Clamped (NPC) topology. The other available topologies such as Active Neutral Point Clamped (ANPC) and Mixed Voltage Neutral Point Clamped (MNPC), along with the advantages and disadvantages of each topology would be studied in this report as well. The 2 other topologies such as a Flying Capacitor Converter (FCC) and Cascaded H-Bridge (CHB) would be briefly touched on upon as well. Research has also been done regarding the commercially available IGBT modules to be used in the testing phase, and simulations of the NPC topology has also been done to allow for more in-depth analysis of the converter. Various Pulse-Width Modulation (PWM) techniques would be included in this report as well, with their differences stated. With this project being a large-scale project by nature, the focus on Three-Level Converters would be narrowed down to determining the turn-on and turn-off characteristics of Silicon Carbide (SiC) MOSFETs using a double pulse test. The methodology of generating the aforementioned double pulse would be included as well, along with the expected results from the testing. The equipment that are used for this project would be elaborated upon as well, with details of their internal workings and how it fits into this project being touched on.