Ultra-low power 8-bit CMOS adder design based on approximate arithmetic
In response to the Moore's law and fast-pace society, low power and high speed IC design has become one of the most critical issues in semiconductor industry. Full adder is a commonly-used calculation tool in reality so that it can be a typical sample for low power IC design. In this paper, 1-b...
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格式: | Theses and Dissertations |
語言: | English |
出版: |
2019
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在線閱讀: | http://hdl.handle.net/10356/78409 |
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機構: | Nanyang Technological University |
語言: | English |