Broad-band design techniques for transimpedance amplifiers

In this paper, a novel bandwidth enhancement technique based on the combination of capacitive degeneration, broad-band matching network, and the regulated cascode (RGC) input stage is proposed and analyzed, which turns the transimpedance amplifier (TIA) design into a fifth-order low-pass filter with...

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Bibliographic Details
Main Authors: Lu, Zhenghao, Yeo, Kiat Seng, Ma, Jianguo, Do, Manh Anh, Lim, Wei Meng, Chen, Xueying
Format: Article
Language:English
Published: 2009
Subjects:
Online Access:https://hdl.handle.net/10356/79967
http://hdl.handle.net/10220/4566
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Institution: Nanyang Technological University
Language: English
Description
Summary:In this paper, a novel bandwidth enhancement technique based on the combination of capacitive degeneration, broad-band matching network, and the regulated cascode (RGC) input stage is proposed and analyzed, which turns the transimpedance amplifier (TIA) design into a fifth-order low-pass filter with Butterworth response. This broad-band design methodology for TIAs is presented with an example implemented in CHRT 0.18-mum 1.8-V RF CMOS technology. Measurement data shows a -3-dB bandwidth of about 8 GHz with 0.25-pF photodiode capacitance. Comparing with the core RGC TIA without capacitive degeneration and broad-band matching network, this design achieves an overall bandwidth enhancement ratio of 3.6 with very small gain ripple. The transimpedance gain is 53 dBOmega with a group delay of 80plusmn20 ps. The chip consumes only 13.5-mW dc power and the measured average input-referred noise current spectral density is 18 pA/radicHz up to 10 GHz.