A CMOS Low-power Temperature-robust RSSI using Weak-inversion Limiting Amplifiers
This paper presents a low-power CMOS receiving signal strength indicator (RSSI). The main architecture of the circuit adopts a six-stage limiting amplifier (LA) in a logarithmic-linear form, which shows a good performance in weak signal detection. The RSSI achieves high tolerance to process, voltage...
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Main Authors: | , , , , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2016
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/82166 http://hdl.handle.net/10220/41138 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | This paper presents a low-power CMOS receiving signal strength indicator (RSSI). The main architecture of the circuit adopts a six-stage limiting amplifier (LA) in a logarithmic-linear form, which shows a good performance in weak signal detection. The RSSI achieves high tolerance to process, voltage, and temperature (PVT) variations by utilizing the unique nature of branch currents in a transconductance amplifier. The power consumption is decreased by using the weak-inversion LAs. Full-waveform current rectification and summation are employed in the RSSI circuit to achieve high precision while maintaining low power consumption. Measured results show that in the 1 kHz–50 MHz frequency range, the input dynamic range is wider than 70 dB within ±2 dB linearity error. The chip occupies an area of 0.7 mm2 × 0.3 mm2 using a 0.18-μm CMOS. It draws 1.3 mA from a 1.8 V supply. |
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