Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology

• Main Author: Teh, Jian Sen
• Other Authors: Siek Liter
• Format: Theses and Dissertations
• Language: English
• Published: 2019
• Subjects: Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: https://hdl.handle.net/10356/82865; http://hdl.handle.net/10220/50293
• Institution: Nanyang Technological University

Aggressive scaling of CMOS technology into deep sub-micron nodes enables analog front-end circuitries to be integrated with digital back-end processors, forming System-on-Chip (SoC) solutions. However, the reduction of supply headroom available to circuits and other impairments resulting from device...