Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits

• Main Authors: Zeinolabedin, Seyed Mohammad Ali, Do, Anh Tuan, Yeo, Kiat Seng, Kim, Tony Tae-Hyoung
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2016
• 主題: Spike; Sorting; Integrated brain circuits interface; CMOS; Subthreshold
• 在線閱讀: https://hdl.handle.net/10356/82912; http://hdl.handle.net/10220/40373
• 機構: Nanyang Technological University

Real time spike detection is the first critical step to develop spike-sorting for integrated brain circuits interface applications. Nonlinear Energy Operator (NEO) and absolute thresholding have been widely used as the spike detection algorithms where NEO has a better performance measured by the probability of detection and false alarm. This paper proposes a hybrid spike detection algorithm incorporating both spike detection algorithms to reduce the power and to keep the detection rate the same as that of NEO. In the proposed algorithm, the absolute thresholding is performed first to detect a potential spike. Once a potential spike is detected, NEO is executed to check whether the detected spike by absolute thresholding is valid. Since NEO is conditionally conducted, this reduces the overall power consumption. The simulation shows that the proposed hybrid method improves the power consumption by 54.48% compared to NEO in 65 nm CMOS technology.