Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits

Real time spike detection is the first critical step to develop spike-sorting for integrated brain circuits interface applications. Nonlinear Energy Operator (NEO) and absolute thresholding have been widely used as the spike detection algorithms where NEO has a better performance measured by th...

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Main Authors: Zeinolabedin, Seyed Mohammad Ali, Do, Anh Tuan, Yeo, Kiat Seng, Kim, Tony Tae-Hyoung
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2016
Subjects:
Online Access:https://hdl.handle.net/10356/82912
http://hdl.handle.net/10220/40373
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-829122020-03-07T13:24:44Z Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits Zeinolabedin, Seyed Mohammad Ali Do, Anh Tuan Yeo, Kiat Seng Kim, Tony Tae-Hyoung School of Electrical and Electronic Engineering IEEE International Symposium on Circuits and Systems Spike Sorting Integrated brain circuits interface CMOS Subthreshold Real time spike detection is the first critical step to develop spike-sorting for integrated brain circuits interface applications. Nonlinear Energy Operator (NEO) and absolute thresholding have been widely used as the spike detection algorithms where NEO has a better performance measured by the probability of detection and false alarm. This paper proposes a hybrid spike detection algorithm incorporating both spike detection algorithms to reduce the power and to keep the detection rate the same as that of NEO. In the proposed algorithm, the absolute thresholding is performed first to detect a potential spike. Once a potential spike is detected, NEO is executed to check whether the detected spike by absolute thresholding is valid. Since NEO is conditionally conducted, this reduces the overall power consumption. The simulation shows that the proposed hybrid method improves the power consumption by 54.48% compared to NEO in 65 nm CMOS technology. Accepted version 2016-04-01T07:52:19Z 2019-12-06T15:08:06Z 2016-04-01T07:52:19Z 2019-12-06T15:08:06Z 2015 Conference Paper Zeinolabedin, S. M. A., Do, A. T., Yeo, K. S., & Kim, T. T.-H. (2015). Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 794-797. https://hdl.handle.net/10356/82912 http://hdl.handle.net/10220/40373 10.1109/ISCAS.2015.7168753 en © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/ISCAS.2015.7168753]. 4 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic Spike
Sorting
Integrated brain circuits interface
CMOS
Subthreshold
spellingShingle Spike
Sorting
Integrated brain circuits interface
CMOS
Subthreshold
Zeinolabedin, Seyed Mohammad Ali
Do, Anh Tuan
Yeo, Kiat Seng
Kim, Tony Tae-Hyoung
Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
description Real time spike detection is the first critical step to develop spike-sorting for integrated brain circuits interface applications. Nonlinear Energy Operator (NEO) and absolute thresholding have been widely used as the spike detection algorithms where NEO has a better performance measured by the probability of detection and false alarm. This paper proposes a hybrid spike detection algorithm incorporating both spike detection algorithms to reduce the power and to keep the detection rate the same as that of NEO. In the proposed algorithm, the absolute thresholding is performed first to detect a potential spike. Once a potential spike is detected, NEO is executed to check whether the detected spike by absolute thresholding is valid. Since NEO is conditionally conducted, this reduces the overall power consumption. The simulation shows that the proposed hybrid method improves the power consumption by 54.48% compared to NEO in 65 nm CMOS technology.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Zeinolabedin, Seyed Mohammad Ali
Do, Anh Tuan
Yeo, Kiat Seng
Kim, Tony Tae-Hyoung
format Conference or Workshop Item
author Zeinolabedin, Seyed Mohammad Ali
Do, Anh Tuan
Yeo, Kiat Seng
Kim, Tony Tae-Hyoung
author_sort Zeinolabedin, Seyed Mohammad Ali
title Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
title_short Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
title_full Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
title_fullStr Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
title_full_unstemmed Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
title_sort design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
publishDate 2016
url https://hdl.handle.net/10356/82912
http://hdl.handle.net/10220/40373
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