Highly secured arithmetic hiding based S-Box on AES-128 implementation

We propose an arithmetic hiding technique on Advanced Encryption Standard (AES) algorithm implementation to highly secure the algorithm against Side-Channel Attack (SCA). The arithmetic operations run parallel with Substitution-Box (S-Box) operation of the AES to hide the correlated leakage power di...

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Main Authors: Pammu, Ali Akbar, Chong, Kwen-Siong, Gwee, Bah Hwee
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2017
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Online Access:https://hdl.handle.net/10356/83739
http://hdl.handle.net/10220/42766
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-837392020-03-07T13:24:44Z Highly secured arithmetic hiding based S-Box on AES-128 implementation Pammu, Ali Akbar Chong, Kwen-Siong Gwee, Bah Hwee School of Electrical and Electronic Engineering 2016 International Symposium on Integrated Circuits (ISIC) Centre for Integrated Circuits and Systems Side-Channel Attack Arithmetic Hiding We propose an arithmetic hiding technique on Advanced Encryption Standard (AES) algorithm implementation to highly secure the algorithm against Side-Channel Attack (SCA). The arithmetic operations run parallel with Substitution-Box (S-Box) operation of the AES to hide the correlated leakage power dissipation with processed data. There are two key features in our proposed hiding technique. First, the function of the arithmetic hiding is independent with S-Box operation and its power dissipation is dominant over the S-Box. Therefore, the dependency of the total power dissipation with processed data in the AES algorithm is relatively low. Second, the security level of proposed technique against SCA based on Correlation Power Analysis (CPA) and Correlation Electromagnetic Analysis (CEMA) attack are increased by 119× and 63× respectively, compared with unprotected S-Box. This is due to the leakage physical parameters (i.e. power dissipation and EM emanation) which is generated by the arithmetic operation hides the leakage parameters of the S-Box operation. Based on the measurement results on Sakura-X FPGA board, which performs AES-128 algorithm, our proposed technique dissipates 3.8mW and features 1.18× higher power dissipation than the unprotected S-Box implementation. However, our proposed arithmetic hiding technique is highly secured, as the result of CPA and CEMA attack require 38,000 power traces and 44,000 EM traces respectively to reveal the secret key. The required number of traces are significantly higher than the unprotected S-Box, which is only 319 power traces and 691 EM traces respectively to uncover the same secret key. ASTAR (Agency for Sci., Tech. and Research, S’pore) Accepted version 2017-06-29T04:22:29Z 2019-12-06T15:31:01Z 2017-06-29T04:22:29Z 2019-12-06T15:31:01Z 2016 Conference Paper Pammu, A. A., Chong, K.-S., & Gwee, B. H. (2016). Highly secured arithmetic hiding based S-Box on AES-128 implementation. 2016 International Symposium on Integrated Circuits (ISIC). (pp. 1-4). https://hdl.handle.net/10356/83739 http://hdl.handle.net/10220/42766 10.1109/ISICIR.2016.7829736 en © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/ISICIR.2016.7829736]. 4 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic Side-Channel Attack
Arithmetic Hiding
spellingShingle Side-Channel Attack
Arithmetic Hiding
Pammu, Ali Akbar
Chong, Kwen-Siong
Gwee, Bah Hwee
Highly secured arithmetic hiding based S-Box on AES-128 implementation
description We propose an arithmetic hiding technique on Advanced Encryption Standard (AES) algorithm implementation to highly secure the algorithm against Side-Channel Attack (SCA). The arithmetic operations run parallel with Substitution-Box (S-Box) operation of the AES to hide the correlated leakage power dissipation with processed data. There are two key features in our proposed hiding technique. First, the function of the arithmetic hiding is independent with S-Box operation and its power dissipation is dominant over the S-Box. Therefore, the dependency of the total power dissipation with processed data in the AES algorithm is relatively low. Second, the security level of proposed technique against SCA based on Correlation Power Analysis (CPA) and Correlation Electromagnetic Analysis (CEMA) attack are increased by 119× and 63× respectively, compared with unprotected S-Box. This is due to the leakage physical parameters (i.e. power dissipation and EM emanation) which is generated by the arithmetic operation hides the leakage parameters of the S-Box operation. Based on the measurement results on Sakura-X FPGA board, which performs AES-128 algorithm, our proposed technique dissipates 3.8mW and features 1.18× higher power dissipation than the unprotected S-Box implementation. However, our proposed arithmetic hiding technique is highly secured, as the result of CPA and CEMA attack require 38,000 power traces and 44,000 EM traces respectively to reveal the secret key. The required number of traces are significantly higher than the unprotected S-Box, which is only 319 power traces and 691 EM traces respectively to uncover the same secret key.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Pammu, Ali Akbar
Chong, Kwen-Siong
Gwee, Bah Hwee
format Conference or Workshop Item
author Pammu, Ali Akbar
Chong, Kwen-Siong
Gwee, Bah Hwee
author_sort Pammu, Ali Akbar
title Highly secured arithmetic hiding based S-Box on AES-128 implementation
title_short Highly secured arithmetic hiding based S-Box on AES-128 implementation
title_full Highly secured arithmetic hiding based S-Box on AES-128 implementation
title_fullStr Highly secured arithmetic hiding based S-Box on AES-128 implementation
title_full_unstemmed Highly secured arithmetic hiding based S-Box on AES-128 implementation
title_sort highly secured arithmetic hiding based s-box on aes-128 implementation
publishDate 2017
url https://hdl.handle.net/10356/83739
http://hdl.handle.net/10220/42766
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