High Secured Low Power Multiplexer-LUT Based AES S-Box Implementation

• Main Authors: Pammu, Ali Akbar, Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Gwee, Bah Hwee
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2016
• 主題: Power dissipation; Logic gates
• 在線閱讀: https://hdl.handle.net/10356/84207; http://hdl.handle.net/10220/41656

We propose a Multiplexer Look-Up-Table (MLUT) based Substitution-Box (S-Box) implementation for the Advanced Encryption Standard (AES) algorithm. There are two key features in the proposed MLUT based S-Box. First, it is implemented based on 256-byte to 1-byte multiplexer with a 256-byte memory inste...