Low power asynchronous 8051 implementation and evaluation

by Ne Kyaw Zwa Lwin
Published 2015

Design and implementation of a digital integrated circuit for logarithmic conversion (AS6)

by Ne Kyaw Zwa Lwin
Published 2011

High Secured Low Power Multiplexer-LUT Based AES S-Box Implementation

by Pammu, Ali Akbar, Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Gwee, Bah Hwee
Published 2016

Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design

by Ho, Weng-Geng, Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Gwee, Bah-Hwee, Chang, Joseph Sylvester
Published 2019

High Performance Low Overhead Template-based Cell-Interleave Pipeline (TCIP) for Asynchronous-Logic QDI Circuits

by Ho, Weng-Geng, Liu, Nan, Ne, Kyaw Zwa Lwin, Chong, Kwen-Siong, Gwee, Bah Hwee, Chang, Joseph Sylvester
Published 2016

Security analysis of asynchronous-logic QDI cell approach for differential power analysis attack

by Ho, Weng-Geng, Pammu, Ali Akbar, Liu, Nan, Ne, Kyaw Zwa Lwin, Chong, Kwen-Siong, Gwee, Bah Hwee
Published 2017

Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM

by Ho, Weng-Geng, Ne, Kyaw Zwa Lwin, Prashanth Srinivas, Nagarajan, Chong, Kwen-Siong, Kim, Tony Tae-Hyoung, Gwee, Bah Hwee
Published 2016

Counteracting differential power analysis: Hiding encrypted data from circuit cells

by Chong, Kwen-Siong, Ne, Kyaw Zwa Lwin, Ho, Weng-Geng, Liu, Nan, Akbar, Ali H., Gwee, Bah-Hwee, Chang, Joseph Sylvester
Published 2016