An End-to-End Multi-Standard OFDM Transceiver Architecture Using FPGA Partial Reconfiguration

Cognitive radios that are able to operate across multiple standards depending on environmental conditions and spectral requirements are becoming more important as the demand for higher bandwidth and efficient spectrum use increases. Traditional custom ASIC implementations cannot support such flexibi...

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Bibliographic Details
Main Authors: Pham, Thinh Hung, Fahmy, Suhaib A., McLoughlin, Ian Vince
Other Authors: School of Computer Science and Engineering
Format: Article
Language:English
Published: 2018
Subjects:
Online Access:https://hdl.handle.net/10356/86895
http://hdl.handle.net/10220/44247
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Institution: Nanyang Technological University
Language: English
Description
Summary:Cognitive radios that are able to operate across multiple standards depending on environmental conditions and spectral requirements are becoming more important as the demand for higher bandwidth and efficient spectrum use increases. Traditional custom ASIC implementations cannot support such flexibility, with standards changing at a faster pace, while software implementations of baseband communication fail to achieve performance and latency requirements. Field programmable gate arrays (FPGAs) offer a hardware platform that combines flexibility, performance, and efficiency, and hence, they have become a key in meeting the requirements for flexible standards-based cognitive radio implementations. This paper proposes a dynamically reconfigurable end-to-end transceiver baseband that can switch between three popular OFDM standards, IEEE 802.11, IEEE 802.16, and IEEE 802.22, operating in non-contiguous fashion with rapid switching. We show that combining FPGA partial reconfiguration with parameterized modules offers a reduction in reconfiguration time of 71% and an FIFO size reduction of 25% compared with the conventional approaches and provides the ability to buffer data during reconfiguration to prevent link interruption. The baseband exposes a simple interface which maximizes compatibility with different cognitive engine implementations.