Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs
Energy optimization is one of the most critical objectives for the synthesis of multiprocessor system-on-chip (MPSoC). Besides, to ensure a long processor lifetime and to maintain a safe chip temperature are also important for multiprocessor manufactures under deep submicrometer process technologies...
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sg-ntu-dr.10356-901032020-03-07T11:49:01Z Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs Liu, Weichen Yi, Juan Li, Mengquan Chen, Peng Yang, Lei School of Computer Science and Engineering Lifetime Reliability Multiprocessor System-on-chip DRNTU::Engineering::Computer science and engineering Energy optimization is one of the most critical objectives for the synthesis of multiprocessor system-on-chip (MPSoC). Besides, to ensure a long processor lifetime and to maintain a safe chip temperature are also important for multiprocessor manufactures under deep submicrometer process technologies. This paper presents a mixed integer linear programming (MILP) model to determine the mapping and scheduling of real-time applications onto embedded MPSoC platforms, such that the total energy consumption is minimized with the lifetime reliability constraint and the temperature threshold constraint satisfied. We develop a lightweight temperature model that can be integrated in the MILP model to predict the chip temperature accurately and efficiently. By exploiting the dynamic voltage and frequency scaling capability of modern processors, processor voltage/frequency assignment is also considered in our MILP model. Extensive performance evaluations on synthetic and real-world applications demonstrate the effectiveness of the proposed approach. Our MILP model achieves an average reduction of 19.09% and 28.53% total energy in comparison with two state-of-the-art techniques on the basis of guaranteeing the safe chip temperature and system lifetime reliability. Accepted version 2019-05-27T04:42:31Z 2019-12-06T17:40:43Z 2019-05-27T04:42:31Z 2019-12-06T17:40:43Z 2019 Journal Article Liu, W., Yi, J., Li, M., Chen, P., & Yang, L. (2019). Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38(1), 1-14. doi:10.1109/TCAD.2018.2801242 0278-0070 https://hdl.handle.net/10356/90103 http://hdl.handle.net/10220/48375 10.1109/TCAD.2018.2801242 en IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCAD.2018.2801242. 14 p. application/pdf |
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Lifetime Reliability Multiprocessor System-on-chip DRNTU::Engineering::Computer science and engineering Liu, Weichen Yi, Juan Li, Mengquan Chen, Peng Yang, Lei Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
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Energy optimization is one of the most critical objectives for the synthesis of multiprocessor system-on-chip (MPSoC). Besides, to ensure a long processor lifetime and to maintain a safe chip temperature are also important for multiprocessor manufactures under deep submicrometer process technologies. This paper presents a mixed integer linear programming (MILP) model to determine the mapping and scheduling of real-time applications onto embedded MPSoC platforms, such that the total energy consumption is minimized with the lifetime reliability constraint and the temperature threshold constraint satisfied. We develop a lightweight temperature model that can be integrated in the MILP model to predict the chip temperature accurately and efficiently. By exploiting the dynamic voltage and frequency scaling capability of modern processors, processor voltage/frequency assignment is also considered in our MILP model. Extensive performance evaluations on synthetic and real-world applications demonstrate the effectiveness of the proposed approach. Our MILP model achieves an average reduction of 19.09% and 28.53% total energy in comparison with two state-of-the-art techniques on the basis of guaranteeing the safe chip temperature and system lifetime reliability. |
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School of Computer Science and Engineering |
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School of Computer Science and Engineering Liu, Weichen Yi, Juan Li, Mengquan Chen, Peng Yang, Lei |
format |
Article |
author |
Liu, Weichen Yi, Juan Li, Mengquan Chen, Peng Yang, Lei |
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Liu, Weichen |
title |
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
title_short |
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
title_full |
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
title_fullStr |
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
title_full_unstemmed |
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs |
title_sort |
energy-efficient application mapping and scheduling for lifetime guaranteed mpsocs |
publishDate |
2019 |
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https://hdl.handle.net/10356/90103 http://hdl.handle.net/10220/48375 |
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1681046129061396480 |