An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications
This paper presents a new CMOS amplifier with...
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sg-ntu-dr.10356-904532020-03-07T13:24:46Z An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications Zhang, Xiao Ling Chan, Pak Kwong School of Electrical and Electronic Engineering IEEE Asia Pacific Conference on Circuits and Systems (2008 : Macau) Chartered Semiconductor Manufacturing Ltd DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This paper presents a new CMOS amplifier with high common-mode rejection ratio (CMRR) and low offset, dedicated to integrated sensors, using total continuous-time design technique but without the need of trimming. This is based on cascading two high-gain differential stages to form a composite front-end gain stage for enhancing CMRR as well as reducing systematic errors, and incorporating an averaging layout technique to reduce the random mismatch errors. Powered by a total 3.3V supply, measurements on 15 samples have shown that the mean and standard deviation of the input-referred offset are 50.4μV and 0.678mV respectively. The proposed amplifier has also achieved CMRR greater than 110dB (0 - 150Hz), offset drift less than 0.8 μV/oC for temperature ranging from –55oC to +125oC, input-referred noise less than 17.47 nV / Hz at 1kHz and active area of 0.117 mm2 in a 0.6 μm CMOS technology. Published version 2010-08-30T06:29:44Z 2019-12-06T17:48:00Z 2010-08-30T06:29:44Z 2019-12-06T17:48:00Z 2008 2008 Conference Paper Zhang, X. L., & Chan, P. K. (2008). An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications. In proceedings of the 9th IEEE Asia Pacific Conference on Circuits and Systems: Macau, China, (pp.802-805). https://hdl.handle.net/10356/90453 http://hdl.handle.net/10220/6364 10.1109/APCCAS.2008.4746144 en © 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. 4 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Zhang, Xiao Ling Chan, Pak Kwong An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Zhang, Xiao Ling Chan, Pak Kwong |
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Conference or Workshop Item |
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Zhang, Xiao Ling Chan, Pak Kwong |
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Zhang, Xiao Ling |
title |
An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
title_short |
An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
title_full |
An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
title_fullStr |
An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
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An untrimmed CMOS amplifier with high CMRR and low offset for sensor applications |
title_sort |
untrimmed cmos amplifier with high cmrr and low offset for sensor applications |
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2010 |
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https://hdl.handle.net/10356/90453 http://hdl.handle.net/10220/6364 |
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description |
This paper presents a new CMOS amplifier with
high common-mode rejection ratio (CMRR) and low offset,
dedicated to integrated sensors, using total continuous-time
design technique but without the need of trimming. This is
based on cascading two high-gain differential stages to form
a composite front-end gain stage for enhancing CMRR as
well as reducing systematic errors, and incorporating an
averaging layout technique to reduce the random mismatch
errors. Powered by a total 3.3V supply, measurements on 15
samples have shown that the mean and standard deviation
of the input-referred offset are 50.4μV and 0.678mV
respectively. The proposed amplifier has also achieved
CMRR greater than 110dB (0 - 150Hz), offset drift less than
0.8 μV/oC for temperature ranging from –55oC to +125oC,
input-referred noise less than 17.47 nV / Hz at 1kHz and
active area of 0.117 mm2 in a 0.6 μm CMOS technology. |