High-speed signal termination analysis using a co-simulation approach

• Main Authors: Chang, Richard Weng Yew, See, Kye Yak, Soh, Wei-Shan, Oswal, Manish, Wang, Lin Biao
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
• Online Access: https://hdl.handle.net/10356/90466; http://hdl.handle.net/10220/6375; http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5403694
• Institution: Nanyang Technological University

Matched terminations of high-speed digital buses have long been the focus of high-speed board design. With increasing edge rates, proper bus termination has become even more crucial in today’s high-speed PCB interconnect design. Using a co-simulation approach, the 3D electromagnetic (EM) effects of high-speed interconnects and the circuit behavioral IBIS models of active devices are combined to investigate highspeed clock termination designs. Such an approach allows the high-frequency effects to be taken into account and therefore yields good accuracy for realistic high-speed board. A practical example is demonstrated based on the co-simulation approach.