Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads

An improved frequency compensation technique is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor to form a composite gain-enhanced feedforward stage in a two-stage amplifier so as to broaden the gain bandwidth via low-frequency pole–zero cancellation at h...

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Main Authors: Chan, Pak Kwong, Chen, Y. C.
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2009
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Online Access:https://hdl.handle.net/10356/91299
http://hdl.handle.net/10220/4680
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-912992020-03-07T14:02:38Z Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads Chan, Pak Kwong Chen, Y. C. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering An improved frequency compensation technique is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor to form a composite gain-enhanced feedforward stage in a two-stage amplifier so as to broaden the gain bandwidth via low-frequency pole–zero cancellation at heavy capacitive loads, but yet without increasing substantial power consumption. The technique has been confirmed by the experimental results. An operational amplifier has been designed to drive a capacitive load of 300 pF. The amplifier exhibits a dc gain of 87 dB, a gain bandwidth of 10.4 MHz at 63.7° phase margin, an average slew rate of 3.5V/µs, a compensation capacitor of only 6 pF while consuming 2.45 mW at a 3-V supply in a standard 0.6- µm CMOS technology. Published version 2009-07-03T06:29:48Z 2019-12-06T18:03:12Z 2009-07-03T06:29:48Z 2019-12-06T18:03:12Z 2003 2003 Journal Article Chan, P. K., & Chen, Y. C. (2003). Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads. IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, 50(12), 933-941. 1057-7130 https://hdl.handle.net/10356/91299 http://hdl.handle.net/10220/4680 10.1109/TCSII.2003.820258 en IEEE transactions on circuits and systems-II : analog and digital signal processing © 2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site. 9 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Chan, Pak Kwong
Chen, Y. C.
Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
description An improved frequency compensation technique is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor to form a composite gain-enhanced feedforward stage in a two-stage amplifier so as to broaden the gain bandwidth via low-frequency pole–zero cancellation at heavy capacitive loads, but yet without increasing substantial power consumption. The technique has been confirmed by the experimental results. An operational amplifier has been designed to drive a capacitive load of 300 pF. The amplifier exhibits a dc gain of 87 dB, a gain bandwidth of 10.4 MHz at 63.7° phase margin, an average slew rate of 3.5V/µs, a compensation capacitor of only 6 pF while consuming 2.45 mW at a 3-V supply in a standard 0.6- µm CMOS technology.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Chan, Pak Kwong
Chen, Y. C.
format Article
author Chan, Pak Kwong
Chen, Y. C.
author_sort Chan, Pak Kwong
title Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
title_short Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
title_full Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
title_fullStr Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
title_full_unstemmed Gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
title_sort gain-enhanced feedforward path compensation technique for pole–zero cancellation at heavy capacitive loads
publishDate 2009
url https://hdl.handle.net/10356/91299
http://hdl.handle.net/10220/4680
_version_ 1681041372238315520