Minimum input sensitivity of high-order multi-stage sigma–delta modulator with first-order front-end

• Main Authors: Ong, C. K., Siek, Liter, Ng, L. S.
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2009
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/91393; http://hdl.handle.net/10220/4626
• 機構: Nanyang Technological University

Employing multi-stage sigma–delta modulators has provided an effective means of eliminating stability problems while achieving highresolution analog-to-digital conversion. However, component matching has become more stringent than a single-stage modulator. Mismatches cause loss in the modulators sig...