Minimum input sensitivity of high-order multi-stage sigma–delta modulator with first-order front-end
Employing multi-stage sigma–delta modulators has provided an effective means of eliminating stability problems while achieving highresolution analog-to-digital conversion. However, component matching has become more stringent than a single-stage modulator. Mismatches cause loss in the modulators sig...
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Main Authors: | Ong, C. K., Siek, Liter, Ng, L. S. |
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Other Authors: | School of Electrical and Electronic Engineering |
Format: | Article |
Language: | English |
Published: |
2009
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/91393 http://hdl.handle.net/10220/4626 |
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Institution: | Nanyang Technological University |
Language: | English |
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