A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers

An ultra-wideband (UWB) 3.1- to 10.6-GHz low-noise amplifier (LNA) employing a common-gate stage for wideband input matching is presented in this paper. Designed in a commercial 0.18-um 1.8-V standard RFCMOS technology, the proposed UWB LNA achieves fully on-chip circuit implementation, contributing...

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Main Authors: Ma, Jianguo, Do, Manh Anh, Lu, Zhenghao, Lu, Yang, Yeo, Kiat Seng, Cabuk, Alper
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2009
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Online Access:https://hdl.handle.net/10356/91515
http://hdl.handle.net/10220/5958
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-915152020-03-07T14:02:40Z A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers Ma, Jianguo Do, Manh Anh Lu, Zhenghao Lu, Yang Yeo, Kiat Seng Cabuk, Alper School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering An ultra-wideband (UWB) 3.1- to 10.6-GHz low-noise amplifier (LNA) employing a common-gate stage for wideband input matching is presented in this paper. Designed in a commercial 0.18-um 1.8-V standard RFCMOS technology, the proposed UWB LNA achieves fully on-chip circuit implementation, contributing to the realization of a single-chip CMOS UWB receiver. The proposed UWB LNA achieves 16 7 0 8 dB power gain with a good input match (S11 9 dB) over the 7500-MHz bandwidth (from 3.1 GHz to 10.6 GHz), and an average noise figure of 4.0 dB, while drawing 18.4-mA dc biasing current from the 1.8-V power supply. A gain control mechanism is also introduced for the first time in the proposed design by varying the biasing current of the gain stage without influencing the other figures of merit of the circuit so as to accommodate the UWB LNA in various UWB wireless transmission systems with different link budgets. Published version 2009-07-31T06:38:46Z 2019-12-06T18:07:04Z 2009-07-31T06:38:46Z 2019-12-06T18:07:04Z 2006 2006 Journal Article Lu, Y., Yeo, K. S., Cabuk, A., Ma, J., Do, M. A., & Lu, Z. (2006). A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers. IEEE Transactions on Circuits and Systems—I: Regular Papers, 53(8), 1683-1692. 1057-7122 https://hdl.handle.net/10356/91515 http://hdl.handle.net/10220/5958 10.1109/TCSI.2006.879059 en IEEE transactions on circuits and systems—I : regular papers IEEE Transactions on Circuits and Systems—I: Regular Papers © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site. 10 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Ma, Jianguo
Do, Manh Anh
Lu, Zhenghao
Lu, Yang
Yeo, Kiat Seng
Cabuk, Alper
A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
description An ultra-wideband (UWB) 3.1- to 10.6-GHz low-noise amplifier (LNA) employing a common-gate stage for wideband input matching is presented in this paper. Designed in a commercial 0.18-um 1.8-V standard RFCMOS technology, the proposed UWB LNA achieves fully on-chip circuit implementation, contributing to the realization of a single-chip CMOS UWB receiver. The proposed UWB LNA achieves 16 7 0 8 dB power gain with a good input match (S11 9 dB) over the 7500-MHz bandwidth (from 3.1 GHz to 10.6 GHz), and an average noise figure of 4.0 dB, while drawing 18.4-mA dc biasing current from the 1.8-V power supply. A gain control mechanism is also introduced for the first time in the proposed design by varying the biasing current of the gain stage without influencing the other figures of merit of the circuit so as to accommodate the UWB LNA in various UWB wireless transmission systems with different link budgets.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Ma, Jianguo
Do, Manh Anh
Lu, Zhenghao
Lu, Yang
Yeo, Kiat Seng
Cabuk, Alper
format Article
author Ma, Jianguo
Do, Manh Anh
Lu, Zhenghao
Lu, Yang
Yeo, Kiat Seng
Cabuk, Alper
author_sort Ma, Jianguo
title A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
title_short A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
title_full A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
title_fullStr A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
title_full_unstemmed A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers
title_sort novel cmos low-noise amplifier design for 3.1-to 10.6-ghz ultra-wide-band wireless receivers
publishDate 2009
url https://hdl.handle.net/10356/91515
http://hdl.handle.net/10220/5958
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