A capacitive-based accelerometer IC using injection-nulling switch technique
This paper presents a new fully integrated sensing interface and signal-conditioning application-specific integrated circuit (ASIC) for automotive accelerometers based on an "injection-nulling switch" (INS) technique. The INS technique simplifies the design of both the switched-capacitor (...
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Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
2010
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/92667 http://hdl.handle.net/10220/6274 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | This paper presents a new fully integrated sensing interface and signal-conditioning application-specific integrated circuit (ASIC) for automotive accelerometers based on an "injection-nulling switch" (INS) technique. The INS technique simplifies the design of both the switched-capacitor (SC) sensing amplifier and its supporting building blocks without jeopardizing its performance. This is done by counteracting the impact of charge injection and clock-feedthrough effects on sensitivity, resolution, and offset. It also decreases the number of opamps, capacitors, and switches being used. This results in reduction of power consumption, potential switching noise, and noise (sampled thermal noise which increases with the number of SC pairs being used) in the ASIC. A two-chip approach has been adopted in the implementation, with sensing element and ASIC. The built-in trimming circuitry and signal-conditioning blocks, which includes a self-test circuit, are implemented internally to eliminate the need for external components. The experimental results have shown that the sensing system IC has achieved a power consumption of 10 mW (2 mA at 5 V), a maximum noise root spectral density of 11.87 µVpk/√Hz equivalent to rms noise root spectral density of 0.187mg/√Hz at 15.63 Hz, a signal-to-noise dynamic range of 77dB for 500-Hz bandwidth and 74 dB for 1-kHz bandwidth based on 50 g, and a maximum clock noise of 1.562 mV. The die size of the ASIC is 2.8 mm x 2.3 mm using a standard 0.6-µm CMOS technology. |
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