Area-power efficient modulo 2n-1 and modulo 2n+1 multipliers for {2n-1, 2n, 2n+1} based RNS
Residue Number System (RNS) is often adopted to implement long and repetitive multiplications of cryptographic and signal processing algorithms. To sustain the competitive advantages of RNS over two's complement system in pervasive computing platforms, the hardware cost of parallel modulo arith...
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Main Authors: | Muralidharan, Ramya, Chang, Chip Hong |
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Other Authors: | School of Electrical and Electronic Engineering |
Format: | Article |
Language: | English |
Published: |
2013
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/95967 http://hdl.handle.net/10220/11449 |
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Institution: | Nanyang Technological University |
Language: | English |
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