DESIGN SPACE EXPLORATION TECHNIQUES FOR FPGA-BASED ACCELERATORS
Ph.D
Saved in:
Main Author: | ZHONG GUANWEN |
---|---|
Other Authors: | COMPUTER SCIENCE |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2017
|
Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/137752 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Language: | English |
Similar Items
-
CLAHE HLS implementation on Zynq SoC FPGA
by: Yoong, Nathaniel Khai Jie
Published: (2024) -
PARALLEL GRAPH PROCESSING ACCELERATORS ON FPGAS
by: CHEN XINYU
Published: (2022) -
Analysis, design and management of multimedia multi- processor systems
by: AKASH KUMAR
Published: (2010) -
An analytical approach for fast and accurate design space exploration of instruction caches
by: Liang, Y., et al.
Published: (2014) -
Static analysis for Fast and accurate design space exploration of caches
by: Liang, Y., et al.
Published: (2013)