PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS

Ph.D

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Bibliographic Details
Main Author: HOO CHIN HAU
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2018
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/142941
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-1429412020-06-02T13:14:40Z PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS HOO CHIN HAU ELECTRICAL & COMPUTER ENGINEERING Heng Chun Huat Ha Yajun Akash Kumar FPGA EDA, deterministic parallel routing, non-deterministic parallel routing, Lagrangian relaxation, recursive bi-partitioning, distributed memory Ph.D DOCTOR OF PHILOSOPHY (FOE) 2018-06-06T18:00:20Z 2018-06-06T18:00:20Z 2017-08-18 Thesis HOO CHIN HAU (2017-08-18). PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/142941 0000-0001-8286-204X en
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
language English
topic FPGA EDA, deterministic parallel routing, non-deterministic parallel routing, Lagrangian relaxation, recursive bi-partitioning, distributed memory
spellingShingle FPGA EDA, deterministic parallel routing, non-deterministic parallel routing, Lagrangian relaxation, recursive bi-partitioning, distributed memory
HOO CHIN HAU
PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
description Ph.D
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
HOO CHIN HAU
format Theses and Dissertations
author HOO CHIN HAU
author_sort HOO CHIN HAU
title PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
title_short PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
title_full PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
title_fullStr PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
title_full_unstemmed PARALLEL ROUTING FOR FIELD PROGRAMMABLE GATE ARRAYS
title_sort parallel routing for field programmable gate arrays
publishDate 2018
url http://scholarbank.nus.edu.sg/handle/10635/142941
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