Microarchitecture modeling for timing analysis of embedded software
Ph.D
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2010
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Online Access: | http://scholarbank.nus.edu.sg/handle/10635/15041 |
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sg-nus-scholar.10635-150412017-10-21T09:39:28Z Microarchitecture modeling for timing analysis of embedded software LI XIANFENG COMPUTER SCIENCE ABHIK ROYCHOUDHURY TULIKA MITRA worst case execution time microarchitecture modeling Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:49:27Z 2010-04-08T10:49:27Z 2006-01-24 Thesis LI XIANFENG (2006-01-24). Microarchitecture modeling for timing analysis of embedded software. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/15041 NOT_IN_WOS en |
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National University of Singapore |
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English |
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worst case execution time microarchitecture modeling |
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worst case execution time microarchitecture modeling LI XIANFENG Microarchitecture modeling for timing analysis of embedded software |
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Ph.D |
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COMPUTER SCIENCE |
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COMPUTER SCIENCE LI XIANFENG |
format |
Theses and Dissertations |
author |
LI XIANFENG |
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LI XIANFENG |
title |
Microarchitecture modeling for timing analysis of embedded software |
title_short |
Microarchitecture modeling for timing analysis of embedded software |
title_full |
Microarchitecture modeling for timing analysis of embedded software |
title_fullStr |
Microarchitecture modeling for timing analysis of embedded software |
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Microarchitecture modeling for timing analysis of embedded software |
title_sort |
microarchitecture modeling for timing analysis of embedded software |
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2010 |
url |
http://scholarbank.nus.edu.sg/handle/10635/15041 |
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1681079128040669184 |