The development of building block circuits for high-speed decimation filters

Master's

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Main Author: CHANDRASEKARAN RAJASEKARAN
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2010
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/15333
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-153332015-02-07T09:46:03Z The development of building block circuits for high-speed decimation filters CHANDRASEKARAN RAJASEKARAN ELECTRICAL & COMPUTER ENGINEERING LIAN YONG CMOS, Differential logic, Decimation filter, Full adder, Flip-Flop, RF digitization Master's MASTER OF ENGINEERING 2010-04-08T10:52:26Z 2010-04-08T10:52:26Z 2006-07-17 Thesis CHANDRASEKARAN RAJASEKARAN (2006-07-17). The development of building block circuits for high-speed decimation filters. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/15333 NOT_IN_WOS en
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
language English
topic CMOS, Differential logic, Decimation filter, Full adder, Flip-Flop, RF digitization
spellingShingle CMOS, Differential logic, Decimation filter, Full adder, Flip-Flop, RF digitization
CHANDRASEKARAN RAJASEKARAN
The development of building block circuits for high-speed decimation filters
description Master's
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
CHANDRASEKARAN RAJASEKARAN
format Theses and Dissertations
author CHANDRASEKARAN RAJASEKARAN
author_sort CHANDRASEKARAN RAJASEKARAN
title The development of building block circuits for high-speed decimation filters
title_short The development of building block circuits for high-speed decimation filters
title_full The development of building block circuits for high-speed decimation filters
title_fullStr The development of building block circuits for high-speed decimation filters
title_full_unstemmed The development of building block circuits for high-speed decimation filters
title_sort development of building block circuits for high-speed decimation filters
publishDate 2010
url http://scholarbank.nus.edu.sg/handle/10635/15333
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