PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE

Master's

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Main Author: LEE YUN
Other Authors: SINGAPORE-MIT ALLIANCE
Format: Theses and Dissertations
Published: 2019
Subjects:
ILD
Online Access:https://scholarbank.nus.edu.sg/handle/10635/153949
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-1539492024-10-26T00:11:09Z PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE LEE YUN SINGAPORE-MIT ALLIANCE CHUA SOO JIN LEE HSU MENG Plasma induced damage trap charge interface trapped charge gate leakage plasma charging TDDB ILD reliability C-V measurement electron shading effect Master's MASTER OF SCIENCE IN ADVANCED MATERIALS FOR MICRO- & NANO- SYSTEMS Dissertation Supervisors 1. Prof. Chua Soo Jin, Deputy Director of SMA, NUS 2. Mr. Lee Hsu Meng, Senior Engineer, Systems on Silicon Manufacturing Company Pte. Ltd. 2019-05-10T04:53:56Z 2019-05-10T04:53:56Z 2010 Thesis LEE YUN (2010). PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/153949 SMA BATCHLOAD 20190422
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic Plasma induced damage
trap charge
interface trapped charge
gate leakage
plasma charging
TDDB
ILD
reliability
C-V measurement
electron shading effect
spellingShingle Plasma induced damage
trap charge
interface trapped charge
gate leakage
plasma charging
TDDB
ILD
reliability
C-V measurement
electron shading effect
LEE YUN
PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
description Master's
author2 SINGAPORE-MIT ALLIANCE
author_facet SINGAPORE-MIT ALLIANCE
LEE YUN
format Theses and Dissertations
author LEE YUN
author_sort LEE YUN
title PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
title_short PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
title_full PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
title_fullStr PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
title_full_unstemmed PROCESS IMPROVEMENT IN 0.152 CMOS FOR PLASMA INDUCED DAMAGE IN GATE CURRENT PERFORMANCE
title_sort process improvement in 0.152 cmos for plasma induced damage in gate current performance
publishDate 2019
url https://scholarbank.nus.edu.sg/handle/10635/153949
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