Design methodologies for instruction-set extensible processors

Design methodologies for instruction-set extensible processors

Ph.D

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Bibliographic Details
Main Author: PAN YU
Other Authors: COMPUTER SCIENCE
Format: Theses and Dissertations
Language:English
Published: 2010
Subjects:
ASIPs, instruction-set extensions, subgraph enumeration algorithm, worst case execution time, adaptive architectures, performance optimization
Online Access:http://scholarbank.nus.edu.sg/handle/10635/15915
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Institution: National University of Singapore
Language: English
id sg-nus-scholar.10635-15915
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spelling sg-nus-scholar.10635-159152015-01-12T16:31:51Z Design methodologies for instruction-set extensible processors PAN YU COMPUTER SCIENCE TULIKA MITRA ASIPs, instruction-set extensions, subgraph enumeration algorithm, worst case execution time, adaptive architectures, performance optimization Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:58:49Z 2010-04-08T10:58:49Z 2009-04-08 Thesis PAN YU (2009-04-08). Design methodologies for instruction-set extensible processors. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/15915 NOT_IN_WOS en
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
language English
topic ASIPs, instruction-set extensions, subgraph enumeration algorithm, worst case execution time, adaptive architectures, performance optimization
spellingShingle ASIPs, instruction-set extensions, subgraph enumeration algorithm, worst case execution time, adaptive architectures, performance optimization
PAN YU
Design methodologies for instruction-set extensible processors
description Ph.D
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
PAN YU
format Theses and Dissertations
author PAN YU
author_sort PAN YU
title Design methodologies for instruction-set extensible processors
title_short Design methodologies for instruction-set extensible processors
title_full Design methodologies for instruction-set extensible processors
title_fullStr Design methodologies for instruction-set extensible processors
title_full_unstemmed Design methodologies for instruction-set extensible processors
title_sort design methodologies for instruction-set extensible processors
publishDate 2010
url http://scholarbank.nus.edu.sg/handle/10635/15915
_version_ 1681079274749034496

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