AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM

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Bibliographic Details
Main Author:	CHUA JIN KIT
Other Authors:	ELECTRICAL ENGINEERING
Format:	Theses and Dissertations
Published:	2020
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/170128
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-170128
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spelling	sg-nus-scholar.10635-1701282020-11-19T13:57:12Z AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM CHUA JIN KIT ELECTRICAL ENGINEERING LIM YONG CHING Master's MASTER OF ENGINEERING 2020-06-17T08:39:57Z 2020-06-17T08:39:57Z 1994 Thesis CHUA JIN KIT (1994). AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/170128 CCK BATCHLOAD 20200626
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	Master's
author2	ELECTRICAL ENGINEERING
author_facet	ELECTRICAL ENGINEERING CHUA JIN KIT
format	Theses and Dissertations
author	CHUA JIN KIT
spellingShingle	CHUA JIN KIT AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
author_sort	CHUA JIN KIT
title	AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
title_short	AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
title_full	AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
title_fullStr	AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
title_full_unstemmed	AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM
title_sort	approach for global routing in vlsi layout based on a new rectilinear steiner tree algorithm
publishDate	2020
url	https://scholarbank.nus.edu.sg/handle/10635/170128
_version_	1686108739264839680

AN APPROACH FOR GLOBAL ROUTING IN VLSI LAYOUT BASED ON A NEW RECTILINEAR STEINER TREE ALGORITHM

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