Instruction cache optimizations for embedded systems
Ph.D
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Format: | Theses and Dissertations |
Language: | English |
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2010
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Online Access: | http://scholarbank.nus.edu.sg/handle/10635/18434 |
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sg-nus-scholar.10635-184342024-10-24T18:20:47Z Instruction cache optimizations for embedded systems LIANG YUN COMPUTER SCIENCE TULIKA MITRA embedded systems, instruction cache, cache modeling, design space exploration, cache locking, procedure placement Ph.D DOCTOR OF PHILOSOPHY 2010-10-31T18:01:00Z 2010-10-31T18:01:00Z 2010-07-01 Thesis LIANG YUN (2010-07-01). Instruction cache optimizations for embedded systems. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/18434 NOT_IN_WOS en |
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National University of Singapore |
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Asia |
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Singapore Singapore |
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English |
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embedded systems, instruction cache, cache modeling, design space exploration, cache locking, procedure placement |
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embedded systems, instruction cache, cache modeling, design space exploration, cache locking, procedure placement LIANG YUN Instruction cache optimizations for embedded systems |
description |
Ph.D |
author2 |
COMPUTER SCIENCE |
author_facet |
COMPUTER SCIENCE LIANG YUN |
format |
Theses and Dissertations |
author |
LIANG YUN |
author_sort |
LIANG YUN |
title |
Instruction cache optimizations for embedded systems |
title_short |
Instruction cache optimizations for embedded systems |
title_full |
Instruction cache optimizations for embedded systems |
title_fullStr |
Instruction cache optimizations for embedded systems |
title_full_unstemmed |
Instruction cache optimizations for embedded systems |
title_sort |
instruction cache optimizations for embedded systems |
publishDate |
2010 |
url |
http://scholarbank.nus.edu.sg/handle/10635/18434 |
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1821184881807327232 |