SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING

Ph.D

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Bibliographic Details
Main Author:	VENKATARAMANI VANCHINATHAN
Other Authors:	COMPUTER SCIENCE
Format:	Theses and Dissertations
Language:	English
Published:	2021
Subjects:	LTE/5G, Scratchpad Memory, Real-time systems, Time-predictable Many-core architecture, Low-power, Baseband Processing
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/186372
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Institution:	National University of Singapore
Language:	English

id	sg-nus-scholar.10635-186372
record_format	dspace
spelling	sg-nus-scholar.10635-1863722024-10-24T20:38:39Z SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING VENKATARAMANI VANCHINATHAN COMPUTER SCIENCE Tulika Mitra LTE/5G, Scratchpad Memory, Real-time systems, Time-predictable Many-core architecture, Low-power, Baseband Processing Ph.D DOCTOR OF PHILOSOPHY (SOC) 2021-02-14T18:00:35Z 2021-02-14T18:00:35Z 2020-02-29 Thesis VENKATARAMANI VANCHINATHAN (2020-02-29). SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/186372 en
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
language	English
topic	LTE/5G, Scratchpad Memory, Real-time systems, Time-predictable Many-core architecture, Low-power, Baseband Processing
spellingShingle	LTE/5G, Scratchpad Memory, Real-time systems, Time-predictable Many-core architecture, Low-power, Baseband Processing VENKATARAMANI VANCHINATHAN SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
description	Ph.D
author2	COMPUTER SCIENCE
author_facet	COMPUTER SCIENCE VENKATARAMANI VANCHINATHAN
format	Theses and Dissertations
author	VENKATARAMANI VANCHINATHAN
author_sort	VENKATARAMANI VANCHINATHAN
title	SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
title_short	SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
title_full	SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
title_fullStr	SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
title_full_unstemmed	SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING
title_sort	software-defined time-predictable many-core architecture for lte baseband processing
publishDate	2021
url	https://scholarbank.nus.edu.sg/handle/10635/186372
_version_	1821234188693536768

SOFTWARE-DEFINED TIME-PREDICTABLE MANY-CORE ARCHITECTURE FOR LTE BASEBAND PROCESSING

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